I am trying to run some basic Ethernet applications (via lwIP) on an ARM Cortex M3 which is on board a M2S150 Development kit and have run into an issue I don't understand:
Error[Lp011]: section placement failed unable to allocate space for sections/blocks with a total estimated minimum size of 0x8dc8 bytes (max align 0x8) in <[0x20008000-0x2000ffff]> (total uncommitted space 0x8000).
Upon further research some forums mentioned that the issue may be that your program does not fit in flash (which I doubt considering I am calling one function just to test things out). Other sources mentioning modifying the linker icf file, but I am not sure if this is the right way to go about it given that Libero generates the icf files when you create a IAR project and would have information on the dev board you are using.
This is the current code I am trying to run:
/* lwIP includes. */
#include "lwip/init.h"
int main(void)
{
lwip_init();
for(;;){}
//Should never reach here.
return 0;
}
Would anyone be able to provide some insight on why this is happening?
EDIT Added ESRAM ICF file:
/******************************************************************************/
/* (c) Copyright 2015 Microsemi SoC Products Group. All rights reserved. */
/* SmartFusion2 scatter file for debugging code executing in internal eSRAM. */
/* */
/* SVN $Revision: 7419 $ */
/* SVN $Date: 2015-05-15 16:50:21 +0100 (Fri, 15 May 2015) $ */
/******************************************************************************/
/*
* Some current (April 2015) dev kit memory map possibilities are
* --Type-------Device-----------address start---address end----size---Dbus--RAM IC-------SF2--Comment---------------
* --eNVM-------M2S010-----------0x60000000------0x6007FFFF-----256KB---------------------010------------------------
* --eNVM-------M2S090-----------0x60000000------0x6007FFFF-----512KB---------------------090------------------------
* --eSRAM------M2Sxxx-----------0x20000000------0x2000FFFF-----64KB----------------------xxx--All have same amount--
* --eSRAM------M2Sxxx-----------0x20000000------0x20013FFF-----80KB----------------------xxx--If ECC/SECDED not used
* --Fabric-----M2S010-----------0x30000000------0x6007FFFF-----400Kb---------------------010--note-K bits-----------
* --Fabric-----M2S090-----------0x30000000------0x6007FFFF-----2074Kb--------------------090--note-K bits-----------
* --LPDDR------STARTER-KIT------0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----050------------------------
* --LPDDR------484-STARTER-KIT--0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16-----010------------------------
* --LPDDR------SEC-EVAL-KIT-----0xA0000000------0xA3FFFFFF-----64MB---16--MT46H32M16LF---090--Security eval kit-----
* --DDR3-------ADevKit----------0xA0000000------0xBFFFFFFF-----1GB----32--MT41K256M8DA---150------------------------
* --Some older physical memory map possibilities are
* --Type-------location---------address start---address end----size---Dbus---RAM IC------SF2--Comment--------------
* --LPDDR------EVAL KIT---------0xA0000000------0xA3FFFFFF-----64MB-=-16--MT46H32M16LF---025--Eval Kit--------------
* --DDR3-------DevKit-----------0xA0000000------0xAFFFFFFF-----512MB--16--MT41K256M8DA---050------------------------
*/
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$configideIcfEditorcortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x20000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_ROM_start__ = 0x20000000;
define symbol __ICFEDIT_region_ROM_end__ = 0x20007FFF;
define symbol __ICFEDIT_region_RAM_start__ = 0x20008000;
define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__ = 0x800;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM_region { readwrite,
block CSTACK, block HEAP };
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